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More in CMOS & VLSI

• Silicon PhysicsSemiconductor foundations, junctions, MOS electrostatics, NMOS/PMOS operation, compact models, and scaled-device nonidealities.
• Layout & SignoffESD, latch-up, back-powering, stick diagrams, DRC/LVS/PEX, PVT, characterization, constraints, and STA.
• Timing & PowerRC delay, logical effort, interconnect, crosstalk, dynamic and short-circuit power, leakage, and glitches.
• Gates & Pass LogicStatic and complex gates, transmission gates, degraded levels, hazards, sizing, and an interactive transistor-level gate atlas.
• Inverter DesignThe voltage-transfer curve, switching threshold, noise margins, sizing, capacitance, delay, and transition behavior.
• Sequential & CDCLatches, flip-flops, setup and hold, clocking, metastability, synchronizers, handshakes, and multi-bit crossings.
• Memory Circuits6T SRAM operation and margins, array periphery, DRAM sensing and refresh, and Flash storage mechanisms.
• I/O & PDNI/O pads, level shifting, open-drain buses, simultaneous switching, ground bounce, decoupling, and PDN behavior.
• BenchcraftMeasurement loading, bandwidth, grounding, current and thermal observation, fault isolation, and evidence capture.
• Scaling FrontierDennard scaling, leakage and power walls, variability, FinFET quantization, and gate-all-around devices.
• CMOS & VLSIA curated silicon curriculum from energy bands and the MOS capacitor through gates, timing, power, memory, I/O, reliability, layout, signoff, FinFETs and GAAFETs—with 110 lessons, worked calculations, bench notes, progress tracking, and transistor-level labs.