Sequential Logic, Metastability & CDC

Chapter 12. Latches, Flip-Flops, and Sequential Timing

12.1 Bistability and cross-coupling

Two inverting stages form a regenerative loop with two stable states and an unstable equilibrium. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Loop gain magnitude greater than one near the metastable point enables regeneration. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Loop gain magnitude greater than one near the metastable point enables regeneration.

The design consequence is concrete: State is stored as charge reinforced by positive feedback, not as an abstract Boolean variable. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. An STA endpoint has required arrival 1100 ps and actual arrival 1040 ps. Compute slack and interpret the sign.

Solution. Positive setup slack is margin; negative slack is a violation. Scenario validity still depends on constraints, exceptions, derates, and waveform range.

slack = required − actual = 60 ps

1. Which approximation in the relation for bistability and cross-coupling is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

12.2 Level-sensitive latches

A latch is transparent during one clock level and holds during the other. Transmission-gate latches provide full-swing data paths. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Timing permits time borrowing while the latch is open, subject to closing-edge setup and hold. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Timing permits time borrowing while the latch is open, subject to closing-edge setup and hold.

The design consequence is concrete: Latch pipelines can improve performance but require disciplined phase, duty-cycle, and race analysis. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. An STA endpoint has required arrival 1350 ps and actual arrival 1420 ps. Compute slack and interpret the sign.

Solution. Positive setup slack is margin; negative slack is a violation. Scenario validity still depends on constraints, exceptions, derates, and waveform range.

slack = required − actual = -70 ps

1. Which approximation in the relation for level-sensitive latches is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

12.3 Edge-triggered flip-flops

Master-slave or pulse-based structures constrain data capture to a narrow interval around an active edge. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is t_CQ and setup/hold depend on data-clock relative timing, slew, load, and internal state. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

t_CQ and setup/hold depend on data-clock relative timing, slew, load, and internal state.

The design consequence is concrete: A flip-flop is a timed analog circuit wrapped in a digital abstraction; cell characterization defines the abstraction boundary. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. An STA endpoint has required arrival 850 ps and actual arrival 790 ps. Compute slack and interpret the sign.

Solution. Positive setup slack is margin; negative slack is a violation. Scenario validity still depends on constraints, exceptions, derates, and waveform range.

slack = required − actual = 60 ps

1. Which approximation in the relation for edge-triggered flip-flops is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

12.4 Setup, hold, and timing equations

Setup checks prevent late data from missing capture; hold checks prevent new data from corrupting the same capture event. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Setup: t_CQ,max+t_comb,max+t_setup <= T_clk-skew-uncertainty. Hold: t_CQ,min+t_comb,min >= t_hold+skew+uncertainty. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Setup: t_CQ,max+t_comb,max+t_setup <= T_clk-skew-uncertainty. Hold: t_CQ,min+t_comb,min >= t_hold+skew+uncertainty.

The design consequence is concrete: Setup is repaired mainly with more time or faster data paths; hold is repaired with added minimum delay and cannot be fixed by lowering clock frequency. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. An STA endpoint has required arrival 1100 ps and actual arrival 1040 ps. Compute slack and interpret the sign.

Solution. Positive setup slack is margin; negative slack is a violation. Scenario validity still depends on constraints, exceptions, derates, and waveform range.

slack = required − actual = 60 ps

1. Which approximation in the relation for setup, hold, and timing equations is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

12.5 Clock gating and reset

Integrated clock-gating cells latch enables to avoid glitches; reset style affects recovery/removal, testability, and CDC behavior. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is A reset deassertion near a clock edge is a synchronization event. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

A reset deassertion near a clock edge is a synchronization event.

The design consequence is concrete: Asynchronous assertion with synchronous deassertion is common because it gives immediate entry but controlled release. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. An STA endpoint has required arrival 1350 ps and actual arrival 1420 ps. Compute slack and interpret the sign.

Solution. Positive setup slack is margin; negative slack is a violation. Scenario validity still depends on constraints, exceptions, derates, and waveform range.

slack = required − actual = -70 ps

1. Which approximation in the relation for clock gating and reset is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

Chapter 13. Metastability and Clock-Domain Crossing

13.1 Metastable equilibrium

A bistable sampled during its aperture can enter a high-gain analog state and require unpredictable time to resolve. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Resolution error probability decays approximately as exp(-T_res/tau). Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Resolution error probability decays approximately as exp(-T_res/tau).

The design consequence is concrete: Metastability cannot be eliminated; it can only be made sufficiently improbable by providing resolution time and controlling event rates. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. A synchronizer has metastability time constant τ = 22 ps. By what factor does MTBF improve if resolution time increases by 110 ps?

Solution. The ratio assumes unchanged clock rate, data rate, and aperture constant. Extra resolution time reduces probability; it never eliminates metastability.

MTBF₂ / MTBF₁ = exp(ΔT/τ) = 148.4×

1. Which approximation in the relation for metastable equilibrium is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

13.2 Synchronizer MTBF

A two-flop synchronizer gives the first stage time to resolve before the second stage is observed. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is MTBF approximately exp(T_res/tau)/(f_clk f_data T_0). Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

MTBF approximately exp(T_res/tau)/(f_clk f_data T_0).

The design consequence is concrete: Small changes in resolution time can improve MTBF exponentially, while higher clock and data rates degrade it linearly. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. A synchronizer has metastability time constant τ = 28 ps. By what factor does MTBF improve if resolution time increases by 150 ps?

Solution. The ratio assumes unchanged clock rate, data rate, and aperture constant. Extra resolution time reduces probability; it never eliminates metastability.

MTBF₂ / MTBF₁ = exp(ΔT/τ) = 212.1×

1. Which approximation in the relation for synchronizer mtbf is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

13.3 Pulse and toggle transfer

A narrow pulse may be missed by a slower domain. Pulse stretching, toggle synchronizers, or handshakes preserve events under stated rate constraints. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is For a toggle scheme, source events must be spaced far enough that the destination observes each transition. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

For a toggle scheme, source events must be spaced far enough that the destination observes each transition.

The design consequence is concrete: Choose a protocol based on event persistence and throughput, not merely signal width. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. A synchronizer has metastability time constant τ = 18 ps. By what factor does MTBF improve if resolution time increases by 80 ps?

Solution. The ratio assumes unchanged clock rate, data rate, and aperture constant. Extra resolution time reduces probability; it never eliminates metastability.

MTBF₂ / MTBF₁ = exp(ΔT/τ) = 85.2×

1. Which approximation in the relation for pulse and toggle transfer is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

13.4 Multi-bit CDC

Synchronizing bus bits independently can create incoherent words. Bundled-data handshakes, Gray codes, or asynchronous FIFOs preserve relationships. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Gray pointers change one bit per increment, reducing ambiguity when sampled asynchronously. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Gray pointers change one bit per increment, reducing ambiguity when sampled asynchronously.

The design consequence is concrete: Gray coding controls transition coherence but does not replace synchronizers or full/empty proof. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. A synchronizer has metastability time constant τ = 22 ps. By what factor does MTBF improve if resolution time increases by 110 ps?

Solution. The ratio assumes unchanged clock rate, data rate, and aperture constant. Extra resolution time reduces probability; it never eliminates metastability.

MTBF₂ / MTBF₁ = exp(ΔT/τ) = 148.4×

1. Which approximation in the relation for multi-bit cdc is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

13.5 Reset-domain crossing and verification

Reset release can create metastability or inconsistent state across domains, so reset distribution is part of CDC architecture. At transistor level, follow the causal chain from terminal bias to charge distribution, electric field, carrier motion, and observable voltage or current. That chain identifies which node stores state, which boundary supplies charge, and why supply, temperature, geometry, or initial condition can move a result that a Boolean abstraction treats as fixed.

The useful first-order relation is Recovery and removal checks are reset analogs of setup and hold. Declare polarities, current directions, units, and operating region before substitution. After calculation, check the assumed region and a limiting case. The expression should remain consistent with charge conservation and topology as a voltage, capacitance, resistance, or device strength approaches an extreme.

Recovery and removal checks are reset analogs of setup and hold.

The design consequence is concrete: Structural CDC tools find patterns; assertions and protocol proofs determine whether those patterns are functionally safe. Compare the sensitivity of the desired metric with the penalties paid in input capacitance, diffusion, leakage, area, noise, reliability, and verification burden. Then propagate the choice into the driving stage, receiving stage, interconnect, power network, and physical layout. A local improvement is useful only when the system-level margin also improves.

Worked example

Problem. A synchronizer has metastability time constant τ = 28 ps. By what factor does MTBF improve if resolution time increases by 150 ps?

Solution. The ratio assumes unchanged clock rate, data rate, and aperture constant. Extra resolution time reduces probability; it never eliminates metastability.

MTBF₂ / MTBF₁ = exp(ΔT/τ) = 212.1×

1. Which approximation in the relation for reset-domain crossing and verification is most likely to fail first in a scaled technology?
2. Design a two-sweep experiment that distinguishes the intended mechanism from a parasitic or measurement artifact.

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