Understand the machine, not just the answer.

How RayBench teaches

Each lesson moves from intuition to definitions, derivations, worked examples, simulation, complete implementation, edge cases, and independent practice. The interactive controls sit alongside the text rather than replacing it, so the reasoning behind a result is always readable.

Embedded C

• Interrupts, Rings & ConcurrencyThe handler is a second thread you did not declare. What is and is not atomic on a single core, the lock-free ring buffer and the conditions it requires, DMA and cache coherency, low-power modes and their wake sources, priority inversion, and debugging a race you cannot reproduce.
• Volatile RegistersMaster volatile keyword usage for memory-mapped registers in embedded C. Interactive simulator shows compiler optimization effects on register reads.
• User-Defined TypesDeclare your own types in embedded C: struct, union, enum, typedef, bitfields, designated initialisers, flexible array members and opaque handles.
• Embedded C and Firmware SystemsOne self-sufficient course connecting beginner C, Embedded C, hardware-facing APIs, bounded data structures, Embedded DSA practice, compiled code, diagnostics and production capstones.
• Bits, Fields & Fixed PointRegister fields and the mask conventions that silently disagree, Gray code and where one-bit-at-a-time matters, fixed-point arithmetic and the intermediate width a multiply needs, the undefined-behaviour traps in ordinary bit idioms, wire-format packing, and what each checksum detects.
• Types / PromotionUnderstand integer promotion and type conversion in embedded C. Interactive lab demonstrates implicit and explicit casting with signed/unsigned types.
• Compiler Workbench & TestingCompile real C for an embedded target and inspect what the compiler produced, then the discipline around it: where to draw the host-testable boundary, reading the generated assembly, undefined behaviour and the sanitizers, the warnings worth enabling, and measuring size and stack.
• Functions & ContractsDesign production C functions and modules with explicit preconditions, postconditions, ownership, status codes, opaque types, reentrancy, HAL seams and failure-state behavior.
• Arrays, Strings & BuffersArrays decay and the length does not travel; strings are a convention, not a type; and every length in a received packet is data rather than fact. Spans, the three string copies, framing and resynchronisation, serialisation, and parsing untrusted input safely.
• Object Layout & StorageWhere an object lives and what it costs: storage duration and linkage, the sections a declaration lands in, struct layout and the padding that makes a struct larger than its members, allocation without a heap, and integrity checks over stored data.
• C Basics & the Translation UnitFrom source text to a linked image: declarations against definitions, the translation unit the compiler actually sees, the preprocessor and what a macro can and cannot do, and the four build stages with the error vocabulary each one produces.
• FSM / DispatchDesign finite state machines with dispatch tables in embedded C. Interactive lab demonstrates state transitions and event handling for firmware.

Embedded DSA

• Embedded Data Structures and Algorithms PracticeA complete embedded-first DSA course with theory, 80 challenges, complete C11 implementations, visual traces, mastery tracking, interview drills, and a constraint-driven firmware design arena.
• Arrays & WindowsTwo pointers, sliding windows, in-place compaction and streaming filters over sample buffers. Twelve problems with complete C11 solutions, complexity targets and edge-case tests.
• Search & LookupBinary search that actually terminates, lookup tables, perfect hashing and command dispatch. Eleven problems on getting a bounded answer out of a table without a heap allocation in sight.
• Lists, Pools & ArenasIntrusive linked lists, fixed-block pools, arena allocators and why malloc is banned in most firmware. Ten problems on owning memory with a bound you can prove before the board ships.
• Trees, Graphs & StateTries for command tables, union-find for connectivity, and state machines that cannot reach an undefined state. Nine problems on structures that encode relationships rather than sequences.
• Parsing & ProtocolsFraming, COBS, incremental parsers and adversarial input. Nine problems on decoding a byte stream from a hostile world without a buffer overflow or an unbounded loop.
• Linked ListsEvery list variant, written for embedded C rather than for a whiteboard: singly and doubly linked, circular lists and sentinels that delete the boundary cases, the intrusive form kernels and firmware actually use, static pools and free lists for systems without malloc, reversal and cycle detection, and an honest account of when an array is the better answer.
• Sorting Under ConstraintWhich sort survives a 512-byte stack and a fixed deadline. Insertion sort for small nearly-sorted windows, heapsort when the worst case must be provable, counting sort for byte keys, and a bounded-depth quicksort - six problems with complete C11 solutions.
• Heaps & SchedulingBinary heaps as timer wheels and task schedulers, and wrap-safe time comparison - the bug that only shows up 49 days after the board is deployed. Eight problems with complete solutions.
• Integer & Fixed-Point MathComputing the right number with no floating-point unit. Q formats, multiply-before-divide, rounding instead of truncating, division by a constant as a multiply and shift, running averages that do not stall, and LFSR jitter for backoff.

CMOS & VLSI

• Silicon Foundations & MOS PhysicsSemiconductor foundations, junctions, MOS electrostatics, NMOS/PMOS operation, compact models, and scaled-device nonidealities.
• Reliability, Layout & SignoffESD, latch-up, back-powering, stick diagrams, DRC/LVS/PEX, PVT, characterization, constraints, and STA.
• Timing, Interconnect & PowerRC delay, logical effort, interconnect, crosstalk, dynamic and short-circuit power, leakage, and glitches.
• Static CMOS, Complex Gates & Pass LogicStatic and complex gates, transmission gates, degraded levels, hazards, sizing, and an interactive transistor-level gate atlas.
• The CMOS InverterThe voltage-transfer curve, switching threshold, noise margins, sizing, capacitance, delay, and transition behavior.
• Sequential Logic, Metastability & CDCLatches, flip-flops, setup and hold, clocking, metastability, synchronizers, handshakes, and multi-bit crossings.

Foundations

• PointersComplete visual pointer laboratory: addresses, dereferencing, pointer arithmetic, arrays and decay, double pointers, dynamic memory, function pointers, const/volatile, MMIO, lifetime bugs — with a step-through memory simulator, 100+ interview questions and a mastery exam.
• Computer Systems from First PrinciplesA beginner-first path from what a computer is through bits, CPUs, addresses, memory hierarchy, SRAM, DRAM, ROM, flash, SSDs, buses, PCIe, SATA, AHCI, NVMe, M.2, boot and performance—with comparisons and interview practice.
• Cache Coherency and Memory OrderingA first-principles course from cache lines and the coherence problem through MSI, MESI, MOESI, snooping, directories, memory ordering, atomics, false sharing, DMA, NUMA, measurement and verification—with a live protocol engine and code lab.
• From Power-On to main()What runs before main(): the Cortex-M reset sequence that gives C the machine it assumes, the linker script that decides where every section lives and why .data has two addresses, the four build stages and which one your error came from, and the order to work through a debug probe that will not connect.
• Number RepresentationBases and why hex is the one you read, two's complement and the asymmetry that makes abs(INT_MIN) undefined, the bit-manipulation idioms with the edge case in each, and byte order - which matters in exactly three places and in none of the arithmetic.

Digital Electronics

• Combinational BlocksEvery combinational building block in one place: multiplexers and demultiplexers, encoders and priority encoders, decoders and address decoding, and the arithmetic circuits from half adder through carry-lookahead. Each with a live explorer and the propagation-delay cost that decides which one you use.
• Sequential DesignStorage and state: latches against flip-flops, the D/T/JK families and how they convert, counters and clock dividers, shift registers and serial conversion, and the Moore/Mealy state machine encodings, with a live stepper for each.
• Timing, Hazards & MetastabilityWhat breaks when logic meets a clock: setup and hold windows, propagation delay and clock skew, static and dynamic hazards, metastability and the synchroniser chain, switch debouncing, and arbitration between requesters that can collide.
• Boolean Algebra & GatesBoolean algebra, the gate set it maps onto, and Karnaugh-map minimisation: the identities that let an expression be rewritten, why NAND and NOR are functionally complete, how a truth table becomes a minimal sum of products, and where don't-care terms come from in real designs.
• Logic Levels & InterfacingThe electrical contract under the logic: threshold voltages and noise margins across TTL, CMOS and LVCMOS families, level shifting and open-drain interfacing, fan-out and drive strength, and where dynamic and static power actually goes.

Architecture

• Microcontroller Assembly LabA working ARM Cortex-M0 assembler and CPU emulator in the browser: real Thumb encodings, N/Z/C/V flags, memory-mapped LEDs/UART/timer, NVIC exception stacking, and graded assembly challenges with automated checking.
• Cortex-MArm Cortex-M programmers model, Thumb-2 ISA, memory-mapped peripherals, and NVIC interrupt handling. Interactive register and stack simulator.

Connectivity

• CAN BusCAN bus arbitration, dominant/recessive voltage levels, bit stuffing, frame structure, and error states. Interactive multi-node arbitration simulator, a full-frame walkthrough that animates every field (SOF, ID, DLC, data, CRC-15, ACK, EOF) on real CANH/CANL voltage waveforms, a CRC noise demo, and a fault-injection debug lab.
• SPISPI bus modes (CPOL/CPHA), clock polarity, phase, and multi-slave chip-select. Interactive lab for MOSI/MISO timing.

Micro & Nano

• How a wafer becomes a functioning deviceSemiconductor fabrication and cleanroom technology: silicon wafers, RCA cleaning, oxidation, lithography, etching, doping, PVD/CVD/ALD, metallization, CMP, packaging, test and the complete CMOS flow from sand to transistor.

DSP

• Camera Engineering from Sensor to ImageComplete camera engineering from optics, CMOS pixels, exposure and RAW formats through MIPI CSI-2, UVC, machine-vision interfaces, ISP/DSP, DMA, V4L2, debugging, code and interview preparation.